1. Field of the Invention
This invention relates to a voltage reference circuit and more particularly to a voltage reference circuit comprising a plurality of FET devices on a semiconductor chip.
2. Description of the Prior Art
There are a number of circuit application areas that require a constant reference voltage, and these areas include voltage regulators, analog comparators, A/D converters, phase lock loops, etc. In bipolar transistor technology, a constant voltage source can be easily provided by using the breakdown characteristics of a p-n junction. However, generation of precise reference voltages in FET technology is particularly challenging because forward biased or avalanching junctions are not generally utilized in the normal functioning of FET devices.
Various voltage reference circuits have been developed for FET technology, and these circuits provide satisfactory operation for most applications. However, the drive toward greater circuit density has led to VLSI FET circuits characterized by large process variations and reduced voltage circuits for lowering power requirements. It was found that the existing FET voltage reference circuits do not provide the compensation for loading effects, compensation for power supply variations and compensation for processing parameter variations needed for the VLSI FET circuits.